1. Field of the Invention
The invention relates to an apparatus for detecting synchronizing signal for establishing synchronization in the field of mobile communication, especially for reducing the processing needed to detect the synchronizing signal using a Digital Signal Processor.
2. Description of the Prior Art
FIG. 9 is block diagram of a construction of the conventional apparatus for detecting synchronizing signal. In FIG. 9, the numeral 1 denotes an antenna, the numeral 2 denotes a frequency converter from RF (radio frequency) band to BB (base band), the numeral 3 denotes a filter, the numeral 4 denotes an AD converter, the numeral 5 denotes a .pi./4 shift QPSK demodulator, the numeral 6 denotes an error counter using all synchronizing signal bit patterns, and the numeral 7 denotes a threshold discriminator.
An operation of the conventional synchronizing signal detection apparatus shown in FIG. 9 is explained below. It is assumed that the length of a signal bit pattern in one frame is 1000 bits, wherein the length of the synchronizing signal bit pattern is 30 bits, as an example. An input analog signal inputted from an antenna is converted into a digital signal in the analog/digital converter 4 and demodulated into a digital demodulation bit pattern in the .pi./4 shift QPSK demodulator and is inputted to the error counter 6. The error counter 6 memorizes 30 bits of the synchronizing signal bit pattern and compares all bits of the input signal bit pattern and 30 bits of the synchronizing signal bit patterns. Therefore, in the prior art, it is necessary to compare the input signal bit pattern with all synchronizing signal bit patterns for 30.times.1000 times, that is, 30,000 times.
There is another conventional apparatus which processes the entire comparison in a special hardware for detecting a synchronizing signal. In other words, the conventional apparatus includes a synchronizing signal detecting circuit for comparing always the input signal bit pattern with 30 bits of the synchronizing signal bit pattern, and for shifting the input signal bit pattern one after another and for detecting a synchronizing signal when all 30 bits patterns are matched with the synchronizing signal.
Since the conventional synchronizing signal detection apparatuses are constructed as described above, the amount of processing increases in the conventional apparatuses which compares all synchronizing signal bit patterns. Therefore, a special hardware or a high speed signal processor is required. Since these apparatuses consume a large amount of electric power, they are inappropriate for the mobile telephone.